Reductions for monotone Boolean circuits

AbstractThe large class, say NLOG, of Boolean functions, including 0-1 Sort and 0-1 Merge, have an upper bound of O(nlogn) for their monotone circuit size, i.e., they have circuits with O(nlogn) AND/OR gates of fan-in two. Suppose that we can use, besides such normal AND/OR gates, any number of more powerful “F-gates” which realize a monotone Boolean function F with r(≥2) inputs and r′(≥1) outputs. Note that the cost of each AND/OR gate is one and we assume that the cost of each F-gate is r. Now we define: A Boolean function f in NLOG is said to be F-Easy if f can be constructed by a circuit with AND/OR/F gates whose total cost is o(nlogn). In this paper we show that 0-1 Merge is not F-Easy for an arbitrary monotone function F such that r′≤r/logr

Space-Efficient Algorithms for Longest Increasing Subsequence

Given a sequence of integers, we want to find a longest increasing subsequence of the sequence. It is known that this problem can be solved in O(n log n) time and space. Our goal in this paper is to reduce the space consumption while keeping the time complexity small. For sqrt(n) <= s <= n, we present algorithms that use O(s log n) bits and O(1/s n^2 log n) time for computing the length of a longest increasing subsequence, and O(1/s n^2 log^2 n) time for finding an actual subsequence. We also show that the time complexity of our algorithms is optimal up to polylogarithmic factors in the framework of sequential access algorithms with the prescribed amount of space

The asymptotic complexity of merging networks

Let M(m, n) be the minimum number of comparators in a comparator network that merges two ordered chains x1 = m. Batcher's odd-even merge yields the following upper bound: M(m, n) = n/2. log2 (m + 1); M (n, n) >= n/2. log2 n + O (n). We prove a new lower bound that matches the upper bound asymptotically: M (m, n) >= (m + n)/2. log2 (m + 1) - O (m), e.g., M (n, n) >= n log2 n - O (n). Our proof technique extends to give similarly tight lower bounds for the size of monotone Boolean circuits for merging, and for the size of switching networks capable of realizing the set of permutations that arise from merging

Probabilistic polynomials, AC0 functions and the polynomial-time hierarchy

AbstractWe show that, for every Boolean function f(x1, …, xn) in the class AC0 and an arbitrary constant k⩾0, there is a size-O(nk + 1) collection Ω of degree-logO(1)n polynomials over Z in x1, …, xn such that, for each x∈{0, 1}n, when p ∈ Ω is randomly chosen, f(x) = p(x) with probability at least 1 − 1/(3nk), and, furthermore, if f(x) = 0 (f(x) = 1), then p(x) = 1 (p(x) = 0) with probability 0. Applying this result, we prove the following: (a) Every Boolean function in the class AC0 can be computed with one-sided error at most 1/(3nk) by some depth-two probabilistic circuits with a threshold gate at the root, nlogO(1)n AND gates of fan-in logO(1)n at the next level, and (k + 1)log2n + O(1) random bits; it can also be computed, for an arbitrary constant l ⩾ 0, by some depth-three deterministic circuits with an OR gate at the root, at most n/(log2n)l Threshold gates at the second level, and nlogO(1)n AND gates of fan-in logO(1)n at the third level. (b) For C = PP, C = P, and MODmP, every language L in the polynomial-time hierarchy is C-easy under a randomized many-one polynomial-time reduction; in fact, for C = PP and C = P, L is C-easy under such a reduction with one-sided error

On the Minimum Number of Completely 3-Scrambling Permutations

A family $\mathcal{P} = \{\pi_1, \ldots , \pi_q\}$ of permutations of $[n]=\{1,\ldots,n\}$ is $\textit{completely}$ $k$-$\textit{scrambling}$ [Spencer, 1972; Füredi, 1996] if for any distinct $k$ points $x_1,\ldots,x_k \in [n]$, permutations $\pi_i$'s in $\mathcal{P}$ produce all $k!$ possible orders on $\pi_i (x_1),\ldots, \pi_i(x_k)$. Let $N^{\ast}(n,k)$ be the minimum size of such a family. This paper focuses on the case $k=3$. By a simple explicit construction, we show the following upper bound, which we express together with the lower bound due to Füredi for comparison. $\frac{2}{ \log _2e} \log_2 n \leq N^{\ast}(n,3) \leq 2\log_2n + (1+o(1)) \log_2 \log _2n$. We also prove the existence of $\lim_{n \to \infty} N^{\ast}(n,3) / \log_2 n = c_3$. Determining the value $c_3$ and proving the existence of $\lim_{n \to \infty} N^{\ast}(n,k) / \log_2 n = c_k$ for $k \geq 4$ remain open

Linear-Size Log-Depth Negation-Limited Inverter for k-tonic Binary Sequences

Abstract: A zero-one sequence x1,..., xn is k-tonic if the number of i’s such that xi � = xi+1 is at most k. The notion generalizes well-known bitonic sequences. In negation-limited complexity, one considers circuits with a limited number of NOT gates, being motivated by the gap in our understanding of monotone versus general circuit complexity, and hoping to better understand the power of NOT gates. In this context, the study of inverters, i.e., circuits with inputs x1,..., xn and outputs ¬x1,..., ¬xn, is fundamental since an inverter with r NOTs can be used to convert a general circuit to one with only r NOTs. In particular, if linearsize log-depth inverter with r NOTs exists, we do not lose generality by only considering circuits with at most r NOTs when we seek superlinear size lower bounds or superlogarithmic depth lower bounds. Markov [JACM1958] showed that the minimum number of NOT gates necessary in an n-inverter is ⌈log 2(n + 1)⌉. Beals, Nishino, and Tanaka [SICOMP98–STOC95] gave a construction of an ninverter with size O(n log n), depth O(log n), and ⌈log 2(n + 1) ⌉ NOTs. We give a construction of circuits inverting k-tonic sequences with size O((log k) n) and depth O(log k log log n + log n) using log 2 n + log 2 log 2 log 2 n + O(1) NOTs. In particular, for the case where k = O(1), our k-tonic inverter achieves asymptotically optimal linear size and logarithmic depth. Our construction improves all the parameters of the k-tonic inverter by Sato, Amano, and Maruoka [CO-COON06] with size O(kn), depth O(k log 2 n), and O(k log n) NOTs. We also give a construction of k-tonic sorters achieving linear size and logarithmic depth with log 2 log 2 n+log 2 log 2 log 2 n+O(1) NOT gates for the case where k = O(1). The following question by Turán remains open: Is the size of any depth-O(log n) inverter with O(log n) NOT gates superlinear? Key Words: circuit complexity, negation-limited circuit, inverter, k-tonic

Monotone Boolean Functions with s Zeros Farthest from Threshold Functions

Let $T_t$ denote the $t$-threshold function on the $n$-cube: $T_t(x) = 1$ if $|\{i : x_i=1\}| \geq t$, and $0$ otherwise. Define the distance between Boolean functions $g$ and $h$, $d(g,h)$, to be the number of points on which $g$ and $h$ disagree. We consider the following extremal problem: Over a monotone Boolean function $g$ on the $n$-cube with $s$ zeros, what is the maximum of $d(g,T_t)$? We show that the following monotone function $p_s$ maximizes the distance: For $x \in \{0,1\}^n$, $p_s(x)=0$ if and only if $N(x) < s$, where $N(x)$ is the integer whose $n$-bit binary representation is $x$. Our result generalizes the previous work for the case $t=\lceil n/2 \rceil$ and $s=2^{n-1}$ by Blum, Burch, and Langford [BBL98-FOCS98], who considered the problem to analyze the behavior of a learning algorithm for monotone Boolean functions, and the previous work for the same $t$ and $s$ by Amano and Maruoka [AM02-ALT02]

@ 1994 Birkhiiuser Verlag, Basel ON ACC

Abstract. We show that every language L in the class ACC can be recognized by depth-two deterministic circuits with a symmetric-function gate at the root and 2 l~176 AND gates of fan-in log ~ at the leaves, or equivalently ~ there exist polynomials p~(xl,. ~,, x~) over Z of degree log ~ and with coefficients of magnitude 2 l~176 and functions h, ~ : Z---, {0, 1} such that for each n and eo~ch x C {0, 1} n, XL(X) = h,.(p~(xt,...,xn)). This improves an earlier result of Yao (1985). We also analyze and improve modulus-amplifying polynomiMs constructed by Toda (1991) and Yao (1985)i Subject classifications. 68Q05, 68Q15, 68Q25